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CS GRE: Difference between revisions

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| Instruction sets <small>'''''general- vs special-purpose registers, condition word, load-store vs register-memory architectures, addressing alignment, register vs immediate vs displacement vs indexed etc addressing, instruction sizes, control flow instructions, opcode expansion, reduced vs complex sets'''''</small>
| Instruction sets <small>'''''general- vs special-purpose registers, condition word, load-store vs register-memory architectures, addressing alignment, register vs immediate vs displacement vs indexed etc addressing, instruction sizes, control flow instructions, opcode expansion, reduced vs complex sets'''''</small>
| '''H&P4''' 1.3, Appx A
| '''H&P4''' 1.3, Appx B, Appx J
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| Computer arithmetic and number representation <small>'''''signed magnitude, one's complement, signed zeros, two's complement, binary coded decimal, IEEE 754, biased representation, denormalization, positive and negative infinity, NaN, nearest rounding, directed rounding, overflow, underflow, carry indicator, arbitrary precision'''''</small>
| Computer arithmetic and number representation <small>'''''signed magnitude, one's complement, signed zeros, two's complement, binary coded decimal, IEEE 754, biased representation, denormalization, positive and negative infinity, NaN, nearest rounding, directed rounding, overflow, underflow, carry indicator, arbitrary precision'''''</small>
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| '''H&P4''' Appx I
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| Register and ALU organization
| Register and ALU organization
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| Cache, main, and secondary storage
| Cache, main, and secondary storage
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| '''H&P4''' Chapter 5.2, Appx C.1-3
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| Virtual memory, paging, and segmentation
| Virtual memory, paging, and segmentation
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| '''H&P4''' Chapter 5, Appx C.4
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|colspan=2| '''Networking and communications'''
|colspan=2| '''Networking and communications'''
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| Interconnect structures (e.g., buses, switches, routers)
| Interconnect structures (e.g., buses, switches, routers)
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| '''H&P4''' Appx E
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| I/O systems and protocols
| I/O systems and protocols
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| '''H&P4''' Chapter 6
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| Synchronization
| Synchronization
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| Pipelining superscalar and out-of-order execution processors
| Pipelining superscalar and out-of-order execution processors
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| '''H&P4''' Appx A
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| Parallel and distributed architectures
| Parallel and distributed architectures