https://nick-black.com/dankwiki/index.php?action=history&feed=atom&title=APX 2026-07-11T18:15:11Z Revision history for this page on the wiki MediaWiki 1.46.0 https://nick-black.com/dankwiki/index.php?title=APX&diff=10250&oldid=prev 2023-07-25T10:26:59Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw-interface=""> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:26, 25 July 2023</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l10">Line 10:</td> <td colspan="2" class="diff-lineno">Line 10:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>==External links==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>==External links==</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* [https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html Introducing Intel Advanced Performance Extensions]</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* [https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html Introducing Intel Advanced Performance Extensions]</div></td></tr> <tr><td colspan="2" class="diff-side-deleted"></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr> <tr><td colspan="2" class="diff-side-deleted"></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">[[CATEGORY: x86]]</ins></div></td></tr> <!-- diff cache key wikidb:diff:1.41:old-10249:rev-10250:php=table --> </table>

Dank https://nick-black.com/dankwiki/index.php?title=APX&diff=10249&oldid=prev 2023-07-25T10:26:30Z

<p>Created page with &quot;Not quite the return of CISC, but a fascinating shot by Intel, claiming &quot;Intel® APX demonstrates the advantage of the variable-length instruction encodings of x86.&quot; The new REX2 and EVEX prefixes are used to modify existing instructions. * Suppression of writes to status registers (eliminating a common source of false dependencies) * Expansion of the conditional instruction set * Fits within existing XSAVE/XRSTOR space due to deprecation of MPX registers * New PUSH2/PO...&quot;</p> <p><b>New page</b></p><div>Not quite the return of CISC, but a fascinating shot by Intel, claiming &quot;Intel® APX demonstrates the advantage of the variable-length instruction encodings of x86.&quot; The new REX2 and EVEX prefixes are used to modify existing instructions.<br /> <br /> * Suppression of writes to status registers (eliminating a common source of false dependencies)<br /> * Expansion of the conditional instruction set<br /> * Fits within existing XSAVE/XRSTOR space due to deprecation of MPX registers<br /> * New PUSH2/POP2 to transfer two registers in a single memory operation<br /> * 32 architectural registers (up from 16), usable in legacy integer instructions via REX2 and AVX via EVEX<br /> * EVEX with legacy integer instructions can specify a destination register<br /> <br /> ==External links==<br /> * [https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html Introducing Intel Advanced Performance Extensions]</div>

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