APX: Difference between revisions
Created page with "Not quite the return of CISC, but a fascinating shot by Intel, claiming "Intel® APX demonstrates the advantage of the variable-length instruction encodings of x86." The new REX2 and EVEX prefixes are used to modify existing instructions. * Suppression of writes to status registers (eliminating a common source of false dependencies) * Expansion of the conditional instruction set * Fits within existing XSAVE/XRSTOR space due to deprecation of MPX registers * New PUSH2/PO..." |
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==External links== | ==External links== | ||
* [https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html Introducing Intel Advanced Performance Extensions] | * [https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html Introducing Intel Advanced Performance Extensions] | ||
[[CATEGORY: x86]] | |||