ESP32: Difference between revisions
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==Annoyances== | ==Annoyances== | ||
* There are plenty of SMT MOSFETs that will work with the ESP32 | * There are plenty of SMT MOSFETs that will work with the ESP32's 3.3V 20 mA outputs... | ||
** but the only through-hole MOSFET I've found that works a damn is the (pricey!) Infineon [https://www.digikey.com/en/products/detail/infineon-technologies/IRLZ44NPBF/ IRLZ44N]. | |||
** the [https://www.infineon.com/cms/en/product/power/mosfet/n-channel/irlb8721/ IRLB8721] also works well | |||
* The ADC is known to be nonlinear and generally not great. | * The ADC is known to be nonlinear and generally not great. | ||
==Boot modes== | |||
There is a bootloader in ROM that runs once the reset is released. The values of strapping pins selects SPI or Download boot mode. In SPI boot mode, the program is run from SRAM after being fetched from flash (Normal Boot), or run directly from flash (Direct Boot); this is determined by inspection of the program header. In Download boot mode, the program is provided over UART, and either written to SPI flash or run directly from SRAM. Software can request a reboot into Download mode. eFuses can disable various paths through the bootloader. Note that the program in flash is commonly a second-stage bootloader, and it is thus which launches the actual user application. | |||
==SoCs, modules, devkits== | ==SoCs, modules, devkits== | ||
There is a three part nomenclature (taken from the [https://products.espressif.com/#/product-selector Product Selector]): the SoC, the module, and the devkit. The SoC is the lowest-level component; it contains the processor(s), radio(s), SRAM, and possibly flash+PSRAM. A module adds several elements to the SoC (perhaps most importantly, an FCC-approved RF stack), but will still require some circuit design to use. A devkit bundles a module onto a PCB along with other components (perhaps most importantly, a USB interface), and can generally be used by itself. | There is a three part nomenclature (taken from the [https://products.espressif.com/#/product-selector Product Selector]): the SoC, the module, and the devkit. The SoC is the lowest-level component; it contains the processor(s), radio(s), SRAM, eFuses, and possibly flash+PSRAM. A module adds several elements to the SoC (perhaps most importantly, an FCC-approved RF stack), but will still require some circuit design to use. A devkit bundles a module onto a PCB along with other components (perhaps most importantly, a USB interface), and can generally be used by itself. | ||
[[File:Espc6.png|thumb|QFN40 ESP32-C6 and QFN32 ESP32-C6-F[HN]<i>x</i> pinouts.]] | [[File:Espc6.png|thumb|QFN40 ESP32-C6 and QFN32 ESP32-C6-F[HN]<i>x</i> pinouts.]] | ||
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Let's have an example. | Let's have an example. | ||
Consider the [https://www.espressif.com/en/products/socs/esp32-c6 ESP32-C6] family of SoCs ( | Consider the [https://www.espressif.com/en/products/socs/esp32-c6 ESP32-C6] family of SoCs ([https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf datasheet]). Each includes a unicore RISC-V running at up to 160 MHz. They are available in QFN40 and QFN32 SMD packaging. The QFN40 package (the true ESP32-C6) has no onboard flash. The ESP32-C6FH<i>x</i> and ESP32-C6FN<i>x</i> in QFN32 packaging sport <i>x</i> MB of flash, supporting High and Normal temperatures, respectively. SoCs consist of the CPU, RAM, EEPROM—all of the ICs necessary for the ESP32-C6 feature set. The F[HN]x SoCs lack GPIO10, GPIO11, GPIO14, SPICS0, SPIQ, SPIWP, VDD_SPI, and SPIHD, but gain SDIO_CLK and SDIO_CMD, for 30 vs 24 exposed pins. | ||
[[File:esp32c6mini.png|thumb|The ESP32-C6-MINI-1 and -1U have the same pinout.]] | [[File:esp32c6mini.png|thumb|The ESP32-C6-MINI-1 and -1U have the same pinout.]] | ||
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==Product line== | ==Product line== | ||
===ESP32-S3=== | |||
* Dualcore XTensa LX7 at 240 MHz | |||
* WiFi 4 (IEEE 802.11n), 2.4 GHz only with [[Bluetooth|BLE5]] | |||
====Devkit notes==== | |||
* Powering via 5V USB is recommended. | |||
* Voltage on GPIO47 and GPIO48 is only 1.8 (V<sub>SPI</sub>), unlike the other pins (3.3, V<sub>DD</sub>). | |||
* Some devkits require the two RGB pads to be shorted before their WS2812 RGB LED can be used | |||
** I suspect this is because the WS2812 can damage the eyes if looked at directly? Unsure. | |||
** Version 1.0 of the DevKitC had the WS2812 on IO48; Version 1.1 has it on IO38. | |||
===ESP32-C6=== | |||
* WiFi6 (IEEE 802.11x), 2.4 GHz only | |||
** [[Bluetooth|BLE5]], Zigbee, Matter, Thread, LR-WPAN (IEEE 802.15.4) | |||
* 2 ADCs (but one of them is used by the radio) | |||
* RISC-V at 160 MHz, low power RISC-V at 20 MHz, 512KB SRAM | |||
* Temperature sensor | |||
===SoCs=== | |||
As of 2024-12: | As of 2024-12: | ||
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===Modules=== | ===Modules=== | ||
As of 2024-12: | |||
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==External links== | ==External links== | ||