Buses and Ports: Difference between revisions
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| PCI-SIG | | PCI-SIG | ||
| PCI Express 1.x | | [[PCIe|PCI Express 1.x]] | ||
| 2x11 pin (fixed) + 2x7 pin (lane 0) (1x, 18 pin) | | 2x11 pin (fixed) + 2x7 pin (lane 0) (1x, 18 pin) | ||
+ 2x14 pin (lanes 1--3) (4x, 32 pin) | + 2x14 pin (lanes 1--3) (4x, 32 pin) | ||
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| PCI-SIG | | PCI-SIG | ||
| PCI Express 2.x | | [[PCIe|PCI Express 2.x]] | ||
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| PCI-SIG | | PCI-SIG | ||
| PCI Express 3.0 | | [[PCIe|PCI Express 3.0]] | ||
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