Check out my first novel, midnight's simulacra!
MSR: Difference between revisions
From dankwiki
No edit summary |
No edit summary |
||
| (2 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
Model-Specific Registers: per-processor extensions in the x86 family, discoverable via [[cpuid]]. Unlike the [[CPUID]] registers, many are configurable. MSR's are read and written at the assembly level via the <tt>RDMSR</tt> and <tt>WRMSR</tt> instructions. | Model-Specific Registers: per-processor extensions in the x86 family, discoverable via [[cpuid]]. Unlike the [[cpuid|CPUID]] registers, many are configurable. MSR's are read and written at the assembly level via the <tt>RDMSR</tt> and <tt>WRMSR</tt> instructions. Some MSRs of note include: | ||
* Accessing the [[Time Stamp Counter]] via '''TSC''' (0x0000_0010) | |||
* Managing SYSENTER/SYSEXIT parameters via '''SEP_{SEL,ESP,EIP}''' (0x0000_0174, 5 and 6) | |||
* Managing SYSCALL/SYSRET parameters via '''STAR''' (0xC000_0081) | |||
* Managing the [[Page Attribute Tables]] via '''PAT''' (0x0000_0277) | |||
* Managing [[MTRR]]s and [[MCA]] | |||
==See Also== | ==See Also== | ||
| Line 5: | Line 10: | ||
[[Category: x86]] | [[Category: x86]] | ||
[[Category: Hardware]] | |||
Latest revision as of 00:53, 22 January 2023
Model-Specific Registers: per-processor extensions in the x86 family, discoverable via cpuid. Unlike the CPUID registers, many are configurable. MSR's are read and written at the assembly level via the RDMSR and WRMSR instructions. Some MSRs of note include:
- Accessing the Time Stamp Counter via TSC (0x0000_0010)
- Managing SYSENTER/SYSEXIT parameters via SEP_{SEL,ESP,EIP} (0x0000_0174, 5 and 6)
- Managing SYSCALL/SYSRET parameters via STAR (0xC000_0081)
- Managing the Page Attribute Tables via PAT (0x0000_0277)
- Managing MTRRs and MCA
