MTRR: Difference between revisions

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Memory Type Range-Registers define write policies for ranges of memory on the x86 architecture. Until the P6, MTRRs governed only peripherals. Following the P6, they also applied to memory accesses by the processor. MTRR's have largely been superseded by [[Page Attribute Tables]].

Memory Type Range-Registers define write policies for ranges of memory on the x86 architecture. Until the P6, MTRRs governed only peripherals. Following the P6, they also applied to memory accesses by the processor. MTRR's have largely been superseded by [[Page Attribute Tables]]. MTRR setup on Linux can be examined via <tt>/proc/mtrr</tt>.

==MTRR States==

For more detail, see my entry on [[Architecture#Caches caches]].

For more detail, see my entry on [[Architecture#Caches|caches]].

* Uncacheable: Must never be cached. Primarily used for memory-mapped I/O.

* Write-through: Write both to cache and backing memory.

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-Memory Type Range-Registers define write policies for ranges of memory on the x86 architecture. Until the P6, MTRRs governed only peripherals. Following the P6, they also applied to memory accesses by the processor. MTRR's have largely been superseded by [[Page Attribute Tables]].
+Memory Type Range-Registers define write policies for ranges of memory on the x86 architecture. Until the P6, MTRRs governed only peripherals. Following the P6, they also applied to memory accesses by the processor. MTRR's have largely been superseded by [[Page Attribute Tables]]. MTRR setup on Linux can be examined via <tt>/proc/mtrr</tt>.
 ==MTRR States==
-For more detail, see my entry on [[Architecture#Caches caches]].
+For more detail, see my entry on [[Architecture#Caches|caches]].
 * Uncacheable: Must never be cached. Primarily used for memory-mapped I/O.
 * Write-through: Write both to cache and backing memory.

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