VEX: Difference between revisions
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* Aside from explicitly aligned [[SSE]] load and store instructions, VEX does not require aligned memory operands | * Aside from explicitly aligned [[SSE]] load and store instructions, VEX does not require aligned memory operands | ||
** This is different from [[SSE]], where the vast majority of instructions require alignment | ** This is different from [[SSE]], where the vast majority of instructions require alignment | ||
===XSAVE area=== | |||
{| border="1" | |||
! Save Area | |||
! Offset (bytes) | |||
! Size (bytes) | |||
|- | |||
| FPU/SSE | |||
| 0 | |||
| 512 | |||
|- | |||
| Header | |||
| 512 | |||
| 64 | |||
|- | |||
| Extended Area 2 ([[AVX]]) | |||
| [[CPUID]].(EAX=0DH, ECX=2):EBX | |||
| [[CPUID]].(EAX=0DH, ECX=2):EAX | |||
|- | |||
|} | |||
==Sources== | ==Sources== | ||
* "[http://www.ragestorm.net/blogs/?p=145 It's Vexed]", Insanely Low-Level, 2009-11-17 | * "[http://www.ragestorm.net/blogs/?p=145 It's Vexed]", Insanely Low-Level, 2009-11-17 | ||