SMP on x86: Difference between revisions

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The primary specification for multiprocessor [[x86]]-based setups is the [http://www.intel.com/design/pentium/datashts/242016.HTM Intel MultiProcessor Specification] (last updated, AFAIK, to revision-006 on 1995-05-15).
The primary specification for multiprocessor [[x86]]-based setups is the [http://www.intel.com/design/pentium/datashts/242016.HTM Intel MultiProcessor Specification] (last updated, AFAIK, to revision-006 on 1995-05-15).
==SMT==
* HyperThreading (Intel SMT) requires CPU, BIOS and OS support. Introduced on the P4.
** Found on (all) i7's, [http://www.intel.com/technology/atom/microarchitecture.htm some Atoms], and some P4's and Core2Duo's (especially those with Xeon branding).
** Pentium-M and Celerons usually lack SMT.
==Interrupts==
==Interrupts==
* IO-APIC routes hardware interrupts to various CPUs ([http://www.mjmwired.net/kernel/Documentation/x86/i386/IO-APIC.txt Linux's IO-APIC.txt])
* IO-APIC routes hardware interrupts to various CPUs ([http://www.mjmwired.net/kernel/Documentation/x86/i386/IO-APIC.txt Linux's IO-APIC.txt])
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[recombinator](0) $ </pre>
[recombinator](0) $ </pre>
==[[Discovery]]==
==Discovery==
* ACPI's MADT table can supply multiprocessor configuration, and is usually used if present
* ACPI's MADT table can supply multiprocessor configuration, and is usually used if present
* MP Table. The FreeBSD program <tt>mptable(1)</tt> can dump this:
* MP Table. The FreeBSD program <tt>mptable(1)</tt> can dump this:
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[bryhlath](0) $ </pre>
[bryhlath](0) $ </pre>
* HyperThreading (Intel SMT) requires CPU, BIOS and OS support. Introduced on the P4.
** Found on (all) i7's, [http://www.intel.com/technology/atom/microarchitecture.htm some Atoms], and some P4's and Core2Duo's (especially those with Xeon branding).
** Pentium-M and Celerons usually lack SMT.


==/proc/cpuinfo==
==/proc/cpuinfo==