CPUID: Difference between revisions
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thread_siblings: 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000101 | thread_siblings: 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000101 | ||
[dumbledore](0) $ </pre> | [dumbledore](0) $ </pre> | ||
==CPUID and [[SMP on x86|multiple threads]]== | |||
* The package must support SMT. Check via bit 28 (0x1c00) of the EDX register after CPUID function 0x00000001 | |||
* The processor must support SMT. Check via bits 23:16 of the EBX register after CPUID function 0x00000001. They must be > 1. | |||
* Number of threads sharing a given cache can be determined via CPUID function 0x00000004, checking EAX bits 25:14 for each cache. | |||
* Number of threads for a given level of topology can be determined via CPUID function 0x0000000B, checking ECX bits 15:8 for each level. | |||
==See Also== | ==See Also== | ||