CUDA: Difference between revisions

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* Write-combining memory (configured via [[MTRR|MTRRs]] or [[Page Attribute Tables|PATs]]) avoids PCI snoop requirements and maximizes linear throughput

** Subtle side-effects; not to be used glibly or carelessly!

* Distributes work at ''block'' granularity to [[#Texture Processing Cluster|Texture Processing Clusters]] (TPCs).

====Texture Processing Cluster====

[[#Streaming Multiprocessors|Streaming Multiprocessors]] (SMs) are grouped into ~~Texture Processing Clusters (~~TPCs). Each TPC contains some number of SMs and a single texture processing unit, including a few filters and a cache for texture memory. The details of these texture caches have not generally been publicized, but NVIDIA optimization guides confirm 1- and 2-dimensional spatial caching to be in effect.

[[#Streaming Multiprocessors|Streaming Multiprocessors]] (SMs) are grouped into TPCs. Each TPC contains some number of SMs and a single texture processing unit, including a few filters and a cache for texture memory. The details of these texture caches have not generally been publicized, but NVIDIA optimization guides confirm 1- and 2-dimensional spatial caching to be in effect.

===Streaming Multiprocessor===

@@ Line 118: / Line 118: @@
 * Write-combining memory (configured via [[MTRR|MTRRs]] or [[Page Attribute Tables|PATs]]) avoids PCI snoop requirements and maximizes linear throughput
 ** Subtle side-effects; not to be used glibly or carelessly!
+* Distributes work at ''block'' granularity to [[#Texture Processing Cluster|Texture Processing Clusters]] (TPCs).
 ====Texture Processing Cluster====
-[[#Streaming Multiprocessors|Streaming Multiprocessors]] (SMs) are grouped into Texture Processing Clusters (TPCs). Each TPC contains some number of SMs and a single texture processing unit, including a few filters and a cache for texture memory. The details of these texture caches have not generally been publicized, but NVIDIA optimization guides confirm 1- and 2-dimensional spatial caching to be in effect.
+[[#Streaming Multiprocessors|Streaming Multiprocessors]] (SMs) are grouped into TPCs. Each TPC contains some number of SMs and a single texture processing unit, including a few filters and a cache for texture memory. The details of these texture caches have not generally been publicized, but NVIDIA optimization guides confirm 1- and 2-dimensional spatial caching to be in effect.
 ===Streaming Multiprocessor===

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