CUDA: Difference between revisions

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A given SM, then, supports '''T''' values through the minimum of {''r''/'''Thr<sub>reg</sub>''', ''s''/'''Thr<sub>shmem</sub>''', and ''t''}; as each thread requires fewer registers and less shared memory, the upper bound converges to ''t''. Motivations for larger blocks include:
A given SM, then, supports '''T''' values through the minimum of {''r''/'''Thr<sub>reg</sub>''', ''s''/'''Thr<sub>shmem</sub>''', and ''t''}; as each thread requires fewer registers and less shared memory, the upper bound converges to ''t''. Motivations for larger blocks include:
* freedom in the ''b'' dimension exposes parallelism until ''t'' <= ''b'' * '''T'''
* freedom in the ''b'' dimension exposes parallelism until ''t'' <= ''b'' * '''T'''
* larger maximum possible kernels
* larger maximum possible kernels (an absolute limit exists on grid dimensions)
Motivations for smaller blocks include:
Motivations for smaller blocks include:
* freedom in the ''t'' dimension exposes parallelism until ''t'' >= ''b'' * '''T'''
* freedom in the ''t'' dimension exposes parallelism until ''t'' >= ''b'' * '''T'''
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We can now optimize for a specific {''t'', ''b'', ''r'' and ''s''}, assuming ''t'' to be a multiple of both ''w'' and ''b'':
We can now optimize for a specific {''t'', ''b'', ''r'' and ''s''}, assuming ''t'' to be a multiple of both ''w'' and ''b'':
* Let '''T''' = ''t'' / ''b''. '''T''' is thus guaranteed to be the smallest multiple of ''w'' such that ''t'' == ''b'' * '''T'''.
* Let '''T''' = ''t'' / ''b''. '''T''' is thus guaranteed to be the smallest multiple of ''w'' such that ''t'' == ''b'' * '''T'''.
* Check the ''r'' and ''w'' conditions.
* Check the ''r'' and ''w'' conditions. '''FIXME: handle reduction'''
* '''FIXME: handle very large (''external'') kernels'''
Optimizing for ranges of hardware values is left as an exercise for the reader.


===Stream Processor===
===Stream Processor===