Nehalem: Difference between revisions
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* Be sure to use register parameter-passing conventions, not the stack, to avoid stalls on store-forward of high-latency floating point stores. | * Be sure to use register parameter-passing conventions, not the stack, to avoid stalls on store-forward of high-latency floating point stores. | ||
* Peak issue rate of 1 128-bit load and 1 128-bit store per cycle. | * Peak issue rate of 1 128-bit load and 1 128-bit store per cycle. | ||
* [[Turbo Boost]] in 133MHz increments | |||
==See Also== | ==See Also== | ||
* The Dark Knight's [http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3448 AnandTech] article, 2008-11-03. | * The Dark Knight's [http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3448 AnandTech] article, 2008-11-03. | ||
[[Category: x86]] | [[Category: x86]] | ||
[[CATEGORY: Hardware]] | [[CATEGORY: Hardware]] | ||