SMP on x86: Difference between revisions
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The primary specification for multiprocessor [[x86]]-based setups is the [http://www.intel.com/design/pentium/datashts/242016.HTM Intel MultiProcessor Specification] (last updated, AFAIK, to revision-006 on 1995-05-15). | The primary specification for multiprocessor [[x86]]-based setups is the [http://www.intel.com/design/pentium/datashts/242016.HTM Intel MultiProcessor Specification] (last updated, AFAIK, to revision-006 on 1995-05-15). | ||
==Interrupts== | |||
* IO-APIC routes hardware interrupts to various CPUs | |||
<pre>[recombinator](0) $ cat /proc/interrupts | |||
CPU0 CPU1 | |||
0: 491 0 IO-APIC-edge timer | |||
8: 87 0 IO-APIC-edge rtc0 | |||
9: 0 0 IO-APIC-fasteoi acpi | |||
16: 609652 0 IO-APIC-fasteoi uhci_hcd:usb1, heci | |||
17: 0 0 IO-APIC-fasteoi pata_marvell | |||
18: 33141 0 IO-APIC-fasteoi sata_promise, uhci_hcd:usb5, ehci_hcd:usb6 | |||
19: 0 0 IO-APIC-fasteoi uhci_hcd:usb4 | |||
21: 15985105 0 IO-APIC-fasteoi uhci_hcd:usb2, ath | |||
23: 8730160 0 IO-APIC-fasteoi uhci_hcd:usb3, ehci_hcd:usb7 | |||
29: 1855556 0 PCI-MSI-edge i915 | |||
30: 1109316 0 PCI-MSI-edge ahci | |||
31: 66952 0 PCI-MSI-edge e1000 | |||
NMI: 0 0 Non-maskable interrupts | |||
LOC: 14417376 16273096 Local timer interrupts | |||
SPU: 0 0 Spurious interrupts | |||
RES: 150950 182106 Rescheduling interrupts | |||
CAL: 278 611 Function call interrupts | |||
TLB: 33349 53705 TLB shootdowns | |||
TRM: 0 0 Thermal event interrupts | |||
THR: 0 0 Threshold APIC interrupts | |||
ERR: 0 | |||
MIS: 0 | |||
[recombinator](0) $ </pre> | |||
==[[ACPI]]== | ==[[ACPI]]== | ||
* The MADT table can supply multiprocessor configuration | * The MADT table can supply multiprocessor configuration | ||