Nehalem: Difference between revisions
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[[File:IAmNehalem.jpg|thumb|right|Ehyeh asher ehyeh]] | [[File:IAmNehalem.jpg|thumb|right|Ehyeh asher ehyeh]] | ||
[[File:Intel Nehalem arch.png|thumb|right|Nehalem microarchitecture]] | [[File:Intel Nehalem arch.png|thumb|right|Nehalem microarchitecture]] | ||
The successor of [[Core 2]], and predecessor of [[Sandy Bridge]]. | |||
* Move to 133MHz [[QPI (Quick Path Interconnect)]], against which the CPU clock is multiplied | * Move to 133MHz [[QPI (Quick Path Interconnect)]], against which the CPU clock is multiplied | ||
* Reintroduction of [[SMP on x86#SMT|SMT (HyperThreading)]] | * Reintroduction of [[SMP on x86#SMT|SMT (HyperThreading)]] | ||