SMP on x86: Difference between revisions
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==[[ACPI]]== | ==[[ACPI]]== | ||
* The MADT table can supply multiprocessor configuration | * The MADT table can supply multiprocessor configuration | ||
* MP Table | * MP Table. The FreeBSD program <tt>mptable(1)</tt> can dump this:<pre>[bryhlath](0) $ sudo mptable | ||
=============================================================================== | |||
MPTable | |||
------------------------------------------------------------------------------- | |||
MP Floating Pointer Structure: | |||
location: BIOS | |||
physical address: 0x000fbd10 | |||
signature: '_MP_' | |||
length: 16 bytes | |||
version: 1.4 | |||
checksum: 0xc6 | |||
mode: Virtual Wire | |||
------------------------------------------------------------------------------- | |||
MP Config Table Header: | |||
physical address: 0x000fbb10 | |||
signature: 'PCMP' | |||
base table length: 508 | |||
version: 1.4 | |||
checksum: 0x84 | |||
OEM ID: 'QEMUCPU ' | |||
Product ID: '0.1 ' | |||
OEM table pointer: 0x00000000 | |||
OEM table size: 0 | |||
entry count: 34 | |||
local APIC address: 0xfee00000 | |||
extended table length: 0 | |||
extended table checksum: 0 | |||
------------------------------------------------------------------------------- | |||
MP Config Base Table Entries: | |||
-- | |||
Processors: APIC ID Version State Family Model Step Flags | |||
0 0x11 BSP, usable 6 0 0 0x0201 | |||
1 0x11 AP, unusable 6 0 0 0x0201 | |||
2 0x11 AP, unusable 6 0 0 0x0201 | |||
3 0x11 AP, unusable 6 0 0 0x0201 | |||
4 0x11 AP, unusable 6 0 0 0x0201 | |||
5 0x11 AP, unusable 6 0 0 0x0201 | |||
6 0x11 AP, unusable 6 0 0 0x0201 | |||
7 0x11 AP, unusable 6 0 0 0x0201 | |||
8 0x11 AP, unusable 6 0 0 0x0201 | |||
9 0x11 AP, unusable 6 0 0 0x0201 | |||
10 0x11 AP, unusable 6 0 0 0x0201 | |||
11 0x11 AP, unusable 6 0 0 0x0201 | |||
12 0x11 AP, unusable 6 0 0 0x0201 | |||
13 0x11 AP, unusable 6 0 0 0x0201 | |||
14 0x11 AP, unusable 6 0 0 0x0201 | |||
15 0x11 AP, unusable 6 0 0 0x0201 | |||
-- | |||
Bus: Bus ID Type | |||
0 ISA | |||
-- | |||
I/O APICs: APIC ID Version State Address | |||
1 0x11 usable 0xfec00000 | |||
-- | |||
I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# | |||
INT conforms conforms 0 0 1 0 | |||
INT conforms conforms 0 1 1 1 | |||
INT conforms conforms 0 2 1 2 | |||
INT conforms conforms 0 3 1 3 | |||
INT conforms conforms 0 4 1 4 | |||
INT conforms conforms 0 5 1 5 | |||
INT conforms conforms 0 6 1 6 | |||
INT conforms conforms 0 7 1 7 | |||
INT conforms conforms 0 8 1 8 | |||
INT conforms conforms 0 9 1 9 | |||
INT conforms conforms 0 10 1 10 | |||
INT conforms conforms 0 11 1 11 | |||
INT conforms conforms 0 12 1 12 | |||
INT conforms conforms 0 13 1 13 | |||
INT conforms conforms 0 14 1 14 | |||
INT conforms conforms 0 15 1 15 | |||
=============================================================================== | |||
[bryhlath](0) $ </pre> | |||
* Interactions with [[cpuid]] | * Interactions with [[cpuid]] | ||
* HyperThreading (Intel SMT) requires CPU, BIOS and OS support. Introduced on the P4. | * HyperThreading (Intel SMT) requires CPU, BIOS and OS support. Introduced on the P4. | ||