Transmeta processors: Difference between revisions

No edit summary
No edit summary
Line 34: Line 34:
|
|
|-
|-
| ROWSPAN="4" | Efficeon
| ROWSPAN="5" | Efficeon
| rowspan="4" | 256-bit + SSE2
| rowspan="5" | 256-bit + SSE2
| TM8300
| TM8300
| BGA-783
| BGA-783