Transmeta processors: Difference between revisions

No edit summary
No edit summary
Line 31: Line 31:
| 256K unified
| 256K unified
| 256 entries, 4-associative
| 256 entries, 4-associative
| SDR/DDR SDRAM 66--133MHz, DDR SDRAM 100--133MHz
| SDR/DDR SDRAM 66--133MHz,
DDR SDRAM 100--133MHz
| 33MHz 32-bit PCI1
| 33MHz 32-bit PCI1
|-
|-