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Transactional memory: Difference between revisions
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==See Also== | ==See Also== | ||
* [http://software.intel.com/en-us/articles/intel-c-stm-compiler-prototype-edition/ Intel Transactional Memory] ABI document | * [http://software.intel.com/en-us/articles/intel-c-stm-compiler-prototype-edition/ Intel Transactional Memory] ABI document | ||
* [http://software.intel.com/en-us/blogs/2012/02/07/coarse-grained-locks-and-transactional-synchronization-explained/ ] James Reinders' "Coarse-grained locks and Transactional Synchronization explained" | |||
* [http://perilsofparallel.blogspot.com/2012/02/transactional-memory-in-intel-haswell.html] Greg Pfister's "Transactional Memory in Intel Haswell: The Good, and a Possible Ugly" | |||
[[CATEGORY: x86]] | [[CATEGORY: x86]] | ||
[[CATEGORY: Hardware]] | [[CATEGORY: Hardware]] | ||
Revision as of 08:42, 14 March 2012
I'm pretty convinced transactional memory is a bunch of crap, frankly.
Update: I'm no longer convinced... Dank 21:53, 13 October 2009 (UTC)
GCC
GCC supports x86 transactional memory as of November 2011 via the -fgnu-tm command line option.
See Also
- Intel Transactional Memory ABI document
- [1] James Reinders' "Coarse-grained locks and Transactional Synchronization explained"
- [2] Greg Pfister's "Transactional Memory in Intel Haswell: The Good, and a Possible Ugly"
