Transactional memory: Difference between revisions
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==See Also== | ==See Also== | ||
* [http://software.intel.com/en-us/articles/intel-c-stm-compiler-prototype-edition/ Intel Transactional Memory] ABI document | * [http://software.intel.com/en-us/articles/intel-c-stm-compiler-prototype-edition/ Intel Transactional Memory] ABI document | ||
* [http://software.intel.com/en-us/blogs/2012/02/07/coarse-grained-locks-and-transactional-synchronization-explained/ | * James Reinders' "[http://software.intel.com/en-us/blogs/2012/02/07/coarse-grained-locks-and-transactional-synchronization-explained/ Coarse-grained locks and Transactional Synchronization explained]" | ||
* [http://perilsofparallel.blogspot.com/2012/02/transactional-memory-in-intel-haswell. | * Greg Pfister's "[http://perilsofparallel.blogspot.com/2012/02/transactional-memory-in-intel-haswell.htmlTransactional Memory in Intel Haswell: The Good, and a Possible Ugly]" | ||
[[CATEGORY: x86]] | [[CATEGORY: x86]] | ||
[[CATEGORY: Hardware]] | [[CATEGORY: Hardware]] | ||