Winbond: Difference between revisions
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Used with the ReadStatusRegister and WriteStatusRegister commands: | Used with the ReadStatusRegister and WriteStatusRegister commands: | ||
* Protection Register (SR1) | * Protection Register (SR1) | ||
** MSB: Status register protect 0 | |||
** B6, B5, B4, B3: Block protection bits, all initialized to 1 (unless set via OTP) | |||
** B2: Type of protection bit. When 1, protection applies to the lower end of the protected blocks; when 0, the upper end | |||
** B1: Write protection mode. Defaults to 0 (Software protection, Quad-SPI) | |||
*** Hardware write protection (/WP, /HOLD) cannot be used with Quad-SPI | |||
** LSB: Status register protect 1 | |||
* Configuration Register (SR2) | * Configuration Register (SR2) | ||
** MSB: OTP lock. Once set to 1, the OTP area (10 2KB pages) cannot be reprogrammed. | ** MSB: OTP lock. Once set to 1, the OTP area (10 2KB pages) cannot be reprogrammed. | ||