Microarchitectures

Microarchitecture is defined as those elements of a CPU design which are, to first order, invisible to application programmers (ie, not part of the instruction set). Those elements which are visible comprise the architecture.

x86 μarchitectures

FIXME: add early clones (NEC V20/V30, etc), AMD, VIA, Cyrix etc...
FIXME: add variants (80188, etc)

Name	Maker	Date	Process (min)	Package	ALU/data bits	Addr bits	Clock(s)	ISA	Notes
8086	Intel	1978	3.2 μm	40-pin DIP	16	20	4.77--10 MHz	x86-16	Segmented memory Optional 80-bit 8087 FP coprocessor
8088	Intel	1979	3.2 μm (?)	40-pin DIP 44-pin PLCC	16/8	20	4.77--10 MHz	x86-16	Designed for use with 8-bit externals Used in IBM PC-5150 / XT-5160 / PCjr-4860
80186	Intel	1982	2.6 μm	68-pin PLCC 68-pin PGA 100-pin PQFP	16	20	6--25 MHz	8086-2	Designed for embedded systems (clock, PIC, DMA on-die)
80286	Intel	1982	1.5 μm	68-pin PGA 68-pin CLCC 68-pin PLCC	16	24	4--12.5 MHz	8086-2	Introduced protected mode/MMU Used in the IBM AT-5170

Instruction sets

• x86-16: The granddaddy of 'em all
• 8086-2: Added ENTER/LEAVE, PUSHA/POPA, INS/OUTS

Physical Packages

• DIP (dual in-line package): 2 parallel rows of pins
• PGA (pin grid array): Regularly-spaced pins in rectangular geometry
• CLCC (ceramic leadless chip carrier): Regularly-spaced metallized castellations in rectangular geometry
• PLCC (plastic lead chip carrier): Regularly-spaced J-leads in rectangular geometry, surface- or package-mounted

References

• A CPU History, David Risley, PCMECH, 2001-03-23
• An Outline of Developments in Intel CPU Architecture, Benjamin MJ Hodgson, University of Southampton, 2007-03-14
• The Red Hill CPU Guide, Red Hill Technology
• Intel 80286 Programmer's Reference Manual, Intel, 1987
• 80186 AMD Datasheet, Advanced Micro Devices, 1991-11-01
• Hermetic Package information, Intersil
• Packages, Evergreen Semiconductor Materials