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- 14:15, 21 September 2009 Dank talk contribs uploaded File:Memoryhierarchy.png (Diagram (from Patterson & Hennessy's ''Computer Architecture: A Quantitative Approach'') of a hypothetical memory hierarchy's path from virtual address access to L2 cache access. 8K pages, direct-mapped 256-entry TLB, direct-mapped 8K L1 (64 byte lines), )
