The Controller Area Networks bus standards describe a two-wire, serial, multi-master, synchronized (but clockless), broadcast-only system designed for vehicles. CAN is one of the mandated transports for ODB-II on-board diagnostics, and is required in all US vehicles since 2008. CAN distance decreases with bit rate, but at low rates can run to the kilometers.
- CAN-1 (1986): Original Bosch protocol
- CAN-2.0 (1991): Bosch update, later standardized by ISO 11519 (1993)
- CAN-2.0A (ISO 11898-3, 2006): 11-bit identifiers, up to 125Kbit/s (CAN-Lo, "Basic CAN", "Reliable CAN"). Star/linear bus.
- CAN-2.0B (ISO 11898-2, 2003, 2016): 29-bit identifiers, up to 1Mbit/s (CAN-High, "Full CAN"). Linear bus, 120Ω at each end.
- ISO 11898-1: Data link layer common to CAN-2.0A and B
- CAN-FD (2012): Bosch extension to CAN-2.0 for up to 64B messages + better CRC
- ISO 15765-2 (2016): "Road vehicles: Diagnostic communication over CAN" ISO-TP L3/L4 for larger (up to 4095B) packets, 15Mbit/s
- ISO 11783 (2017): "ISOBUS" at 250Kbit/s, 4-wire terminating plug-and-play bias circuits (power, ground, CAN)
The mechanical connector is not mandated by any CAN standard, and proprietary ones are regularly used. External interfaces will often provide e.g. DE-9 (female on the bus, male on the ECU).
The various nodes of a CAN are known as ECUs (Electronic Control Units). Each can be assumed to include a microprocessor, a (possibly integrated) ISO 11898-1 CAN controller, and a ISO 11898-2/3 transceiver ("medium access unit"). Each ECU must have its own ID unique among the nodes. Depending on the flavor of CAN, IDs are either 11 or 29 bits.
Lower IDs have priority over higher IDs. While transmitting a message, each ECU must also listen. If it sees a 0 while sending a 1, it must cease to transmit until the current message ends. Logical 0 is the "dominant" signal:
- If multiple ECUs are transmitting at the same cycle, all must transmit recessive, or everyone will see dominant
- Transition to dominant is slower than transition from dominant
- Synchronization begins on the first recessive to dominant transition after an idle period ("start bit" of frame)
- Resynchronization occurs on each subsequent recessive to dominant transition