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CS GRE: Difference between revisions
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| Register and ALU organization | | Register and ALU organization | ||
| | | '''H&P4''' Appx F (Vector processors) | ||
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| Data paths and control sequencing | | Data paths and control sequencing | ||
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| Parallel and distributed architectures | | Parallel and distributed architectures | ||
| | |'''H&P4''' Chapter 4 | ||
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|colspan=2|'''THEORY AND MATHEMATICAL BACKGROUND - 40%''' | |colspan=2|'''THEORY AND MATHEMATICAL BACKGROUND - 40%''' |