Check out my first novel, midnight's simulacra!
DDIO: Difference between revisions
From dankwiki
(Created page with "Data Direct I/O is an [https://www.intel.com/content/www/us/en/io/data-direct-i-o-technology.html Intel technology] allowing PCIe devices to interact directly with local processor LLCs (Last Level Caches). It supersedes and extends Direct Cache Access, and is present on E7 Xeons of the second generation and later, and all E5 Xeons. ==Configuration== Model-specific register 0xc8b controls which LLC ways are used by DDIO. There is currently no CPUID element co...") |
|||
| Line 2: | Line 2: | ||
==Configuration== | ==Configuration== | ||
[[MSR|Model-specific register]] 0xc8b controls which LLC ways are used by DDIO. There is currently no CPUID element corresponding to DDIO. | [[MSR|Model-specific register]] 0xc8b controls which LLC ways are used by DDIO (per PCIe root). There is currently no CPUID element corresponding to DDIO. | ||
==External links== | ==External links== | ||
Revision as of 00:56, 22 January 2023
Data Direct I/O is an Intel technology allowing PCIe devices to interact directly with local processor LLCs (Last Level Caches). It supersedes and extends Direct Cache Access, and is present on E7 Xeons of the second generation and later, and all E5 Xeons.
Configuration
Model-specific register 0xc8b controls which LLC ways are used by DDIO (per PCIe root). There is currently no CPUID element corresponding to DDIO.
External links
- "Reexamining Direct Cache Access to Optimize I/O Intensive Applications for Multi-hundred-gigabit Networks", Farshin + Roozbeh + Maguire + Kostić, USENIX ATC 2020
