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21 September 2009

  • curprev 14:1514:15, 21 September 2009‎ Dank talk contribs‎ 341 bytes +341‎ Diagram (from Patterson & Hennessy's ''Computer Architecture: A Quantitative Approach'') of a hypothetical memory hierarchy's path from virtual address access to L2 cache access. 8K pages, direct-mapped 256-entry TLB, direct-mapped 8K L1 (64 byte lines),
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