Transmeta processors: Difference between revisions

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[[File:Transmeta-corp-logo.JPG|thumb|right|Transmeta Corporation logo]]
* [[:File:Tm8300tm8600.pdf|TM8300/TM8600 product spec]]
* [[:File:Tm8300tm8600.pdf|TM8300/TM8600 product spec]]
* [[:File:Tm3200.pdf|TM3200 product spec]]
* [[:File:Tm3200.pdf|TM3200 product spec]]
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! Interface
! Interface
! Frequencies
! Frequencies
! L1 Cache(s)
! L1 Caches
! L2 Cache
! L2 Cache
! TLB
! TLB
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[[File:Tm5400_chip.jpg|thumb|TM5400]]
[[File:Tm5400_chip.jpg|thumb|right|TM5400]]
 
2x ALU, 1x Load/Store
 
1x Branch, 1x FP/MM
| TM3200
| TM3200
| BGA-474
| BGA-474
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| 64K 8-associative code,
| 64K 8-associative code,
64K 16-associative data  
64K 16-associative data  
| 256K unified
| 256K 4-associative unified
| 256 entries, 4-associative
| 256 entries, 4-associative
| SDR/DDR SDRAM 66--133MHz,
| SDR/DDR SDRAM 66--133MHz,
DDR SDRAM 100--133MHz
DDR SDRAM 100--133MHz
| 33MHz 32-bit PCI1
| 33MHz 32-bit PCI
|-
|-
| ROWSPAN="5" | Efficeon (256-bit + SSE2)
| ROWSPAN="5" | Efficeon (256-bit + SSE2)




[[File:KL_Transmeta_Efficeon_8600.jpg|thumb|TM8600]]
[[File:KL_Transmeta_Efficeon_8600.jpg|thumb|right|TM8600]]
2x ALU, 2x Load/Store/Add
 
2x Execute, 2x FP/MM/SSE/SSE2
 
1x Branch, 1x Alias, 1x Control
| TM8300
| TM8300
| BGA-783
| BGA-783
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|}
|}
==See Also==
==See Also==
* The [http://www.sandpile.org/docs/tmta.htm sandpile] has a fine Transmeta collection
* The [http://www.sandpile.org/docs/tmta.htm sandpile] has a fine Transmeta doc collection
** And a [http://www.sandpile.org/impl/crusoe.htm Crusoe] reference
** Not to mention an [http://www.sandpile.org/impl/efficeon.htm Efficeon] reference
* A good [http://hubpages.com/hub/Ball-Grid-Array-Guide BGA page] at HubPages.
[[CATEGORY: Hardware]]
[[CATEGORY: X86]]

Latest revision as of 12:30, 17 April 2010

Transmeta Corporation logo
Family Model Interface Frequencies L1 Caches L2 Cache TLB Memories Peripherals
Crusoe (128-bit + MMX)


TM5400

2x ALU, 1x Load/Store

1x Branch, 1x FP/MM

TM3200 BGA-474 366--400MHz 64K 8-associative code,

32K 8-associative data

none 256 entries, 4-associative SDR SDRAM 66--133MHz 33MHz 32-bit PCI
TM5400 BGA-474 500--700MHz 64K 8-associative code,

64K 16-associative data

256K 4-associative unified 256 entries, 4-associative SDR/DDR SDRAM 66--133MHz,

DDR SDRAM 100--133MHz

33MHz 32-bit PCI
Efficeon (256-bit + SSE2)


TM8600

2x ALU, 2x Load/Store/Add

2x Execute, 2x FP/MM/SSE/SSE2

1x Branch, 1x Alias, 1x Control

TM8300 BGA-783 900MHz--1.1GHz 128K 4-associative code,

64K 8-associative data

512K 4-associative unified 256 entries, 4-associative 100--166MHz DDR SDRAM + SPD 400MHz HyperTransport, AGP 1x/2x/4x
TM8600 BGA-783 900MHz--1.1GHz 128K 4-associative code,

64K 8-associative data

1M 4-associative unified 256 entries, 4-associative 100--166MHz DDR SDRAM + SPD 400MHz HyperTransport, AGP 1x/2x/4x
TM8620 BGA-592 900MHz--1.1GHz 128K 4-associative code,

64K 8-associative data

1M 4-associative unified 256 entries, 4-associative 100--200MHz DDR SDRAM + SPD 400MHz HyperTransport, AGP 1x/2x/4x
TM8800 BGA-783 1.1GHz--1.7GHz 128K 4-associative code,

64K 8-associative data

1M 4-associative unified 256 entries, 4-associative 100--200MHz DDR SDRAM + SPD 400MHz HyperTransport, AGP 1x/2x/4x
TM8820 BGA-592 1.1GHz--1.7GHz 128K 4-associative code,

64K 8-associative data

1M 4-associative unified 256 entries, 4-associative 100--200MHz DDR SDRAM + SPD 400MHz HyperTransport, AGP 1x/2x/4x

See Also