Transmeta processors: Difference between revisions

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! Core
! Core
! Model
! Model
! Interface
! Frequencies
! Frequencies
! L1 Cache(s)
! L1 Cache(s)
! L2 Cache
! L2 Cache
! Memory interface
! Memories
! Peripherals
|-
|-
| rowspan="2" | Crusoe
| rowspan="2" | Crusoe
| rowspan="2" | 128-bit
| rowspan="2" | 128-bit
| TM3200
| TM3200
|
| 333--400MHz
| 333--400MHz
| 64K code, 32K data
| 64K code, 32K data
| none
| none
| SDRAM
| SDRAM
|
|-
|-
| TM5400
| TM5400
|
| 500--700MHz
| 500--700MHz
| 64K code, 64K data  
| 64K code, 64K data  
| 256K unified
| 256K unified
| SDRAM, DDR SDRAM
| SDRAM, DDR SDRAM
|
|-
|-
| ROWSPAN="4" | Efficeon
| ROWSPAN="4" | Efficeon
| rowspan="4" | 256-bit + SSE2
| rowspan="4" | 256-bit + SSE2
| TM8300
| TM8300
|
| 900MHz--1.1GHz
| 900MHz--1.1GHz
| 128K code, 64K data
| 128K code, 64K data
| 512K unified
| 512K unified
| 100--166MHz DDR
| 100--166MHz DDR SDRAM + SPD
| 400MHz HyperTransport, AGP 1x/2x/4x
|-
|-
| TM8600
| TM8600
|
| 900MHz--1.1GHz
| 900MHz--1.1GHz
| 128K code, 64K data
| 128K code, 64K data
| 1M unified
| 1M unified
| 100--166MHz DDR
| 100--166MHz DDR SDRAM + SPD
| 400MHz HyperTransport, AGP 1x/2x/4x
|-
|-
| TM8620
| TM8620
|
|
|
|
|
|
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|-
|-
| TM8800
| TM8800
|
|
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|
|
|

Revision as of 00:26, 15 April 2010

Family Core Model Interface Frequencies L1 Cache(s) L2 Cache Memories Peripherals
Crusoe 128-bit TM3200 333--400MHz 64K code, 32K data none SDRAM
TM5400 500--700MHz 64K code, 64K data 256K unified SDRAM, DDR SDRAM
Efficeon 256-bit + SSE2 TM8300 900MHz--1.1GHz 128K code, 64K data 512K unified 100--166MHz DDR SDRAM + SPD 400MHz HyperTransport, AGP 1x/2x/4x
TM8600 900MHz--1.1GHz 128K code, 64K data 1M unified 100--166MHz DDR SDRAM + SPD 400MHz HyperTransport, AGP 1x/2x/4x
TM8620
TM8800