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Winbond: Difference between revisions

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==[https://www.winbond.com/resource-files/w25n01gv%20revg%20032116.pdf W25N01GV]==
==[https://www.winbond.com/resource-files/w25n01gv%20revg%20032116.pdf W25N01GV]==
A 1Gb (128MB) Quad-SPI SLC NAND chip of 64K 2KB pages, capable of up to 104MHz Quad-SPI.
A 1Gb (128MB) Quad-SPI SLC NAND chip of 1K 128KB blocks (each made up of 64 2KB pages), capable of up to 104MHz Quad-SPI.
Packagings include:
Packagings include:
* 8-pad WSON 8x6mm (package code ZE)
* 8-pad WSON 8x6mm (package code ZE)
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* CLK serial clock input
* CLK serial clock input
* /CS chip select input
* /CS chip select input
** High deselects the device, putting it into standby mode (reduced power consumption)
** Transition to low places device into active mode
** /CS must track VCC during initialization and shutdown
* DI (IO0) data input / data io0
* DI (IO0) data input / data io0
* DO (IO1) data output / data io1
* DO (IO1) data output / data io1
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* VCC power (2.7V--3.6V)
* VCC power (2.7V--3.6V)
* GND
* GND
/WP and /HOLD are only for SPI/Dual-SPI (Quad-SPI uses data io 0--3). Data is always written on the rising edge of CLK, and read on the falling edge. SPI must write through DO and read through DI. Dual- and Quad-SPI treat data io pins as bidirectional.

Revision as of 03:35, 29 March 2019

Winbond of Taiwan manufactures semiconductor devices, including flash storage.

W25N01GV

A 1Gb (128MB) Quad-SPI SLC NAND chip of 1K 128KB blocks (each made up of 64 2KB pages), capable of up to 104MHz Quad-SPI. Packagings include:

  • 8-pad WSON 8x6mm (package code ZE)
  • 16-pin SOIC 300-mil (package code SF)
  • 1x4 + 4x5 24-ball 8x6mm TFBGA (package code TB)
  • 4x6 24-ball 8x6mm TFBGA (package code TC)

Lines:

  • CLK serial clock input
  • /CS chip select input
    • High deselects the device, putting it into standby mode (reduced power consumption)
    • Transition to low places device into active mode
    • /CS must track VCC during initialization and shutdown
  • DI (IO0) data input / data io0
  • DO (IO1) data output / data io1
  • /WP (IO2) write protect input / data io2
  • /HOLD (IO3) hold input / data io3
  • VCC power (2.7V--3.6V)
  • GND

/WP and /HOLD are only for SPI/Dual-SPI (Quad-SPI uses data io 0--3). Data is always written on the rising edge of CLK, and read on the falling edge. SPI must write through DO and read through DI. Dual- and Quad-SPI treat data io pins as bidirectional.