Not quite the return of CISC, but a fascinating shot by Intel, claiming "Intel® APX demonstrates the advantage of the variable-length instruction encodings of x86." The new REX2 and EVEX prefixes are used to modify existing instructions.
- Suppression of writes to status registers (eliminating a common source of false dependencies)
- Expansion of the conditional instruction set
- Fits within existing XSAVE/XRSTOR space due to deprecation of MPX registers
- New PUSH2/POP2 to transfer two registers in a single memory operation
- 32 architectural registers (up from 16), usable in legacy integer instructions via REX2 and AVX via EVEX
- EVEX with legacy integer instructions can specify a destination register