Background
PCI Express continues the PCI 2.3 tradition of supporting locked transaction sequences (RMW—ready-modify-write) to support legacy device software. PCI Express devices and their software drivers are never allowed to use instructions that cause the CPU to generate locked operations that target memory that resides beneath the Roor Complex level.
Locked operations consist of the basic RMW sequence, that is:
One or more memory reads from the target location to obtain the semaphore value. The modification of the data within a processor register. One or more writes to write the modified semaphore value back to the target memory location.
This transaction sequence must be performed such that no other accesses are permitted to the target locations (or device) during the locked sequence. This requires blocking other transactions during the operation. The result potentially can result in deadlocks and poor performance.
The devices required to support locked sequences are:
The Root Complex. Any Switches in the path leading to a legacy devices that may be the target of a locked transaction series. A PCI Express - to - PCI Bridge. A PCI Express-to-PCI-X Bridge. Any legacy devices whose device drivers issue locked transactions to memory residing within the legacy device.
No other devices must support locked transactions and must ignore any locked transactions that they receive.
Lock in the PCI environment is achieved, in part, via the use of the PCI LOCK# signal. The equivalent functionality in PCI Express is accomplished via a transaction that emulates the LOCK signal functionality.
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