Type 1 Configuration Request

While in transit to the destination bus, a configuration read or write takes the form of a Type 1 configuration read or write when it is performed on each bus on the way to the destination bus. The only devices that pay attention to a Type 1 configuration read or write are PCI-to-PCI bridges. Upon receipt of a Type 1 configuration read or write request packet, a PCI-to-PCI bridge compares the target bus number in the packet header to the range of buses that reside behind the bridge (as defined by the contents of the bridge's Secondary Bus Number and Subordinate Bus Number configuration registers; see Figure 20-3 on page 728 and Figure 20-4 on page 730).

• If the target bus is the bridge's secondary bus, the packet is converted from a Type 1 to a Type 0 configuration request when it is passed to the secondary bus. The devices on that bus then decode the packet header as previously described in "Type 0 Configuration Request" on page 732.

• If the target bus is not the bridge's secondary bus but is a bus that resides beneath its secondary bus, the Type 1 request is passed through to the bridge's secondary bus as is.

Figure 20-7 and Figure 20-8 illustrate the Type 1 configuration read and write request header formats. In both cases, the Type field = 00101, while the state of the Fmt field's msb indicates whether it's a read or a write.