A Multifunction Device Within a Root Complex or a Switch

A Multifunction Device Within a Root Complex

Refer to Figure 21-9 on page 759.

The spec is unclear on whether or not a P2P on the root bus within a Root Complex can be a multifunction device. It states that the rules regarding the implementation of the Header Register (see Figure 21-7 on page 752) in a PCI-to-PCI bridge within a Root Complex or a Switch are defined by the PCI 2.3 spec rather than the PCI Express spec. This being the case, it would be legal for function 0 in a bridge that resides on the internal bus of a Root Complex to have the Multifunction bit (bit 7) in the Header Register set to 1. This would indicate that up to seven additional functions could reside within this Root Complex device and each of them could be PCI-to-PCI bridges.

The only open issue in the authors' eyes is the contents of the Device/Port Type field in the Capability register (see Figure 21-5 on page 750 and Table 21-1 on page 753) of each of these bridge functions. It is assumed that it would have to be 0100b (i.e., Root Port of PCI Express Root Complex).

A Multifunction Device Within a Switch

Refer to Figure 21-10 on page 760 and Figure 21-11 on page 761. The spec doesn't preclude the inclusion of a multifunction device within a switch wherein each of the functions represents a PCI-to-PCI bridge to a downstream link.

In the first example the switch's internal bus implements two multifunction devices each of which contains four functions, and each function is the bridge to one of the switch's downstream ports. In the switch's upstream port bridge, the contents of the Device/Port Type field in the Capability register (see Figure 21-5 on page 750 and Table 21-1 on page 753) is 0101b (i.e., Upstream Port of PCI Express Switch).

In the second example, the bridge representing the switch's upstream port is device 0 on the link (i.e. bus) entering the switch and it is a multifunction device containing two functions each of which is a bridge to a separate internal switch bus. The contents of the Device/Port Type field in the Capability register (see Figure 21-5 on page 750 and Table 21-1 on page 753) of each of these functions is 0101b (i.e., Upstream Port of PCI Express Switch). Each of the internal buses has two multifunction devices attached, and each function is the bridge to one of the switch's downstream ports. The contents of the Device/Port Type field in the Capability register (see Figure 21-5 on page 750 and Table 21-1 on page 753) of each of these functions is 0110b (i.e., Downstream Port of PCI Express Switch).