Physical Layer Error Handling
When the Physical Layer logic detects an error, it sends a Receiver Error indication to the Data Link Layer. The specification lists a few of these errors, but it is far from being an exhaustive error list. It is up to the designer to determine what Physical Layer errors to detect and report.
Some of these errors include:
Response of Data Link Layer to 'Receiver Error' Indication
If the Physical Layer indicates a Receiver Error to the Data Link Layer, the Data Link Layer discards the TLP currently being received and frees any storage allocated for the TLP. The Data Link Layer schedules a NAK DLLP for transmission back to the transmitter of the TLP. Doing so automatically causes the transmitter device to replay TLPs from the Replay Buffer, resulting in possible auto-correction of the error. The Data Link Layer may also direct the Physical Layer to initiate Link re-training (i.e., link recovery).
Detected Link errors may also result in the Physical Layer initiating the Link retraining (recovery) process.
In addition, the device that detects a Receiver Error sets the Receiver Error Status bit in the Correctable Error Status register (see Figure 24-20 on page 936) of the PCI Express Extended Advanced Error Capabilities register set. If enabled to do so, the device sends an ERR_COR (correctable error) message to the Root Complex (See "Advanced Uncorrectable Error Handling" on page 386 for details on error logging and reporting).
|